This is a post in a series about me poking at the insides of my OWON SDS7012 oscilloscope. You might want to start reading at the beginning.

I’ve finally managed to convince myself to clean up the source code for my Linux port and FPGA image for the SDS7102. You can find all of it on GitHub.

Don’t look to closely at the MyHDL code though. I’m still learning and it’s ugly and you might go blind.

The Linux port is a bunch of ugly hacks and quick fixes to get something running at all on the scope. And there are traces of my failed attempt to make a devicetree based port left in there.

I hope that the instructions in the README will be enough to get you started, if not, just send me a mail and ask.

Update: I’ve done some more work on the fast buses in the scope.